Session: Government Agency Student Posters

Paper Number: 173335

3-D Package Stack Thermal Control and Throttling for Federated Computation 

The advancement of 3-D heterogeneous integration has enabled high-density compute systems by vertically stacking processing units, significantly improving performance in edge computing, AI inference, and real-time embedded applications. However, this architectural benefit comes with major thermal management challenges due to intensified internal heat generation and limited surface area for dissipation. Traditional thermal control strategies such as fixed-frequency throttling or reactive frequency reduction fail to address dynamic thermal patterns and inter-device differences within stacked packages. In response, this paper proposes a hybrid, predictive thermal control framework that integrates real-time temperature sensing, neural network-based forecasting, and Mixture-of-Experts (MoE) task scheduling for efficient, thermally-aware computation across vertically stacked microcontrollers. We build a six-layer prototype system using ESP32-S3 microcontrollers enclosed in a custom 3-D printed shell to emulate chiplet stacking. Each ESP32-S3 operates independently but shares workload information and temperature data with a host computer. The devices perform a parallelized image edge detection task based on Sobel filtering under different operating frequencies (80, 160, and 240 MHz). Thermal data, including SoC temperature, ambient conditions, task state, and neighboring thermal profiles, are sampled at 20 Hz and used to train a lightweight feedforward neural network that predicts the future temperature of each chiplet 10 seconds in advance. Prediction accuracy reaches a mean absolute error of 0.18 °C and R² = 0.996, enabling early intervention before thermal thresholds are exceeded. On the scheduling side, the predicted thermal state is fed into a Mixture-of-Experts model that assigns a task ratio to each chiplet. The model considers the current temperature, frequency, workload history, and vertical position within the stack to determine how much of the next computational batch each device should receive. Devices operating at higher frequencies or experiencing higher thermal stress are dynamically assigned a smaller workload, while cooler, underutilized chiplets take on more processing. This approach avoids localized thermal overload while sustaining system-level throughput. Experimental evaluations demonstrate the effectiveness of this method. Under temperature constraints of 45 °C and 50 °C, the system successfully stabilizes all devices within 1 °C of the target threshold, with no overshoot or thermal runaway. Compared to baseline fixed-frequency operation, the NN+MoE system completes up to 572 task rounds within the thermal limit, outperforming the static 240 MHz setup which reaches only 534 rounds but exceeds 56 °C. These results validate that early-stage thermal forecasting combined with adaptive scheduling enables fine-grained thermal control without compromising performance. The proposed framework is fully asynchronous, allowing each chiplet to request task assignments independently without centralized synchronization, which enhances scalability in distributed embedded environments. Moreover, the use of open-source microcontrollers and low-overhead neural models makes this solution cost-effective and suitable for deployment in constrained edge systems. Future directions include merging the prediction and scheduling models into a unified architecture for better co-adaptation, introducing long-horizon thermal modeling to capture cumulative heating effects, and generalizing the scheduler for heterogeneous workloads. As stacked microcontroller and chiplet architectures become more prevalent, data-driven thermal management will be critical for safe and efficient operation in space- and power-constrained platforms.

Presenting Author: Yi Liu University of Vermont

Presenting Author Biography: Yi Liu is a Ph.D. candidate in Mechanical Engineering at the University of Vermont. His research focuses on thermal-aware computing, embedded system design, and intelligent scheduling for 3-D chiplet stacks. He has developed predictive thermal management frameworks that combine real-time sensing, neural networks, and mixture-of-experts models to improve performance in thermally constrained systems. Yi has also contributed to smart infrastructure monitoring projects involving sensor networks, microrobotics, and augmented reality. His work bridges embedded hardware experimentation with data-driven control strategies, aiming to enhance the reliability and efficiency of next-generation computing platforms. He has also delivered K–12 STEM workshops and worked extensively with ESP32-based sensing and control systems.

Authors:

Yi Liu University of Vermont
Parth Sandeepbhai Shah Intel Corporation
Tian Xia University of Vermont
Dryver Huston University of Vermont